• Product Introduction
HBM3

OVERVIEW

MSquare's High-Bandwidth Memory generation 3 (HBM3) IP which supports the JESD235E (HBM3) memory standard is designed for high memory throughput and low latency applications. Consisting of PHY and Memory Controller, the MSquare's HBM3 IP supports HBM3 SDRAM speeds ranging from 4.8Gbps/pin to 6.4Gbps/pin. Flexible configurations including PHY Only, PHY + Controller, and Controller Only are available to accommodate customer design specifications. Additionally, the chip's footprint and power consumption are highly competitive within the industry.



HIGHLIGHTS

Designed for high memory throughput and low latency applications

Consists PHY and Memory Controller

Optimized for 12nm process

Supports speed up to 6.4Gbps/pin

Inclusive of own PLL and IO

Flexible configurations available: (PHY only) or ( PHY + Controller) or (Controller only)

Supports both firmware-based training and hardware-based training

Optional Add-on IPs to achieve best performance

Minimized area and power consumption



HBM

Series upgrade products
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